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ADS 2006 Update 1

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ADS 2006 Update 1

 

Signal Integrity and a Whole Lot More in ADS 2006 Release

Signal Integrity is the focus of the ADS 2006 Update 1 release. Update 1 provides a host of new capabilities that are essential for high speed digital design, while setting a new standard for ADS as the Signal Integrity simulation tool-of-choice for the industry.

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ADS 2006 Update 1

Breakthrough Time Domain Simulation Technology

The majority of the high speed Signal Integrity designers, those working at 1 Gbps and above, require simulation of S-parameters, and other passive frequency domain models, for channel modeling. They need this capability in order to accurately predict system BER performance and to generate meaningful eye diagrams. Convolution simulation technology and broadband SPICE model extraction are currently the only tools available that satisfy these requirements.

Over ten years ago, EEsof introduced convolution simulation technology to the EDA industry, and since then RF/Microwave designers have been using it with great success for high speed digital designs. With ever increasing data rates, and the increased design complexity, designers have identified passivity and causality as two major limitations of S-parameter models that often prevent them predicting accurate time domain response. Passivity and causality of S-parameter models are not new problems, but well known limitations with the current simulation tools.

The new convolution simulation technology in the Update 1 release is a breakthrough solution to both these challenging problems. This new convolution simulator provides an option to automatically enforce passivity on S-parameter models, and can determine, very accurately, the causal time domain response which represents the original S-parameter data.

This significant new capability puts ADS 2006 at the forefront for SI, as the only tool on the market today which can accurately predict the time domain response of band-limited S-parameter models.

Native IBIS I/O Models in the ADS Environment

IBIS models are utilized industry-wide for modeling the non-linear behavior of IC drivers, outputs, and receivers, inputs. For data rates up to 3 Gbps, the majority of the semiconductor vendors provide IC representation with data derived from this modeling.

Both ADS 2005A and ADS 2006A provided limited support for IBIS modeling utilizing the Design Kit functionality. These IBIS simulations were based upon externally created FDD based models, and as a result, were limited in both capability and performance.

ADS 2006 Update 1 provides the native IBIS I/O models in the ADS environment, combining excellent performance and an easy to use intuitive interface. Designers can now place IBIS models directly on the ADS schematic page, select the IBIS file, select the pin name, and simulate for time domain performance. Of course the bias power supply, trigger and load need to be connected for this simulation.

The new release supports 18 of the most popular IBIS models. Future releases will expand support to include others as appropriate. The new E8949 IBIS I/O Model Library is a direct replacement of the Model 85243 IBIS models (MDS), and comes with a separate license and price tag. By default, the IBIS I/O models will be a part of Signal Integrity Bundles, Analog LTP, and Integrated bundle LTP, and can also be added to other bundles.

Agilent's Broadband SPICE Model Generator

Also included in Update 1 is a new product, E4687 Broadband SPICE Model Generator (BBSMG). It provides designers with the capability to convert measured or simulated S-parameter models to lumped equivalent or pole zero representations. Lumped equivalent representations can be used with various types of SPICE simulators. The BBSMG also gives the designer the ability to enforce passivity during broadband SPICE model extractions.

Agilent's Broadband SPICE Model Generator is licensed separately. It is included in E9011L ADS Signal Integrity Designer Pro and E9012L ADS Signal Integrity Designer Premier, and it can be added to other ADS bundles at an additional cost. For details, consult your Agilent EEsof EDA representative.

Allegro Design Flow Integration

Allegro Design Flow Integration, Allegro DFI, provides a convenient way to import Allegro layout directly into the ADS environment for EM simulation. Designers can import a complete digital board layout or just selected critical nets. The standardized approach of Allegro DFI allows tailoring of power and ground planes for easy and effective EM modeling using Momentum and EMDS. In addition, Allegro DFI provides automatic substrate creation and via hole mapping for easy EM simulation setups. This product is a part of all ADS bundles, and cannot be purchased separately.

Wireless Libraries Updated With 3GPP LTE

The E8895 3GPP LTE Wireless Library has already been released and is available to download from the Knowledge Center. The 3GPP LTE Wireless Library is a separate add-on and is not included with ADS 2006 Update 1.

Also, please note that ADS 2006 Update 1 is a separate release from ADS 2006A. As a result, be aware that you must be in the appropriate product section of the Knowledge Center, ADS 2006A or ADS 2006 Update 1, to correctly download the 3GPP LTE Wireless Library.

Support of Cadence's IC6.1 in RFDE 2006 Update 1

With the RFDE 2006 Update 1 release, 13 February 2007, RFDE will be compatible with Cadence's IC6.1 Virtuoso Platform L environment and the OpenAccess2.2 PDKs used by IC6.1. Additionally, this new RFDE release continues support of IC5.1.41 with either CDBA or OA PDKs.

In late 2006 Cadence rolled out their latest Custom IC platform, IC6.1. This is a major update on their user interface and an enabling of the platform for "constraint and design-rule driven (correct-by-construction) design." They are promoting this as the next step in custom front-to-back IC design and a significant increase in designer productivity as IC designs push to smaller and smaller geometries.

The product is available in three versions, or platforms, L, XL, or GXL, each with increasing capabilities and linkages between tools. The needs and requirements for RFDE support of the XL and GXL platforms is under investigation.

Cadence's IC6.1 will only support OpenAccess2.2 PDKs. The previous CDBA PDKs will not work with IC6.1. Please contact your PDK supplier for PDK updates.

Cadence has announced that support of the present IC5.1.41 will continue until the end of 2008.

Faster is Better

As a final note, and to highlight the continuous emphasis on speed improvements, you may recall that the original release of ADS 2006A provided a 30% improvement in simulation speed. Along with all the new capabilities, Update 1 provides an additional 10% improvement in speed. No question about it, faster is better.

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