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Advanced Design System - Wireless Test Benches |  |
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Improved Flow for RF Circuit VerificationTraditionally, system designers design to wireless system-level specifications while circuit designers design to circuit-level specifications, characterized by discrete-tone stimuli. Since the two requirements are not the same, uncertainty and "surprises" at the final verification of prototype test is common. To reduce the number of these "surprises" and to increase the success in the first pass, an improved flow is proposed where key system specifications (EVM, BER, ACPR) are validated continuously at system, RF block, circuit, and RF layout as well as at the final prototype test levels. This improved flow is in contrast to traditional flow where system specifications are only verified in the final stage. The direct consequence of this improved flow is reduction of surprises, elimination of integration issues particularly between RF and baseband and overall a more predictable flow. The new Wireless Test Benches and new Sources and Measurements introduced in ADS 2004A are focused on equipping the "circuit" stage of the flow with system measurements without leaving the circuit design environment. To support this flow, ADS 2004 introduces two new offerings: (1) Modulated Wireless Sources and Measurements, and (2) Wireless Test Benches.
Nonlinear and distortion measurements have traditionally been performed using CW stimulus signals. However, given the modulated and wideband nature of most of the popular and emerging (wireless) formats, accurate characterization and verification would require complex modulated stimuli and measurement for test. In these cases, accurate measurement can only be achieved by using a stimulus signal with the same power statistics and bandwidth as the real signal. In ADS 2004A, the following six modulated and standards-compliant sources have been introduced:
The following figure compares the output of a 3GPPFDD_Uplink source at 12.2 Kbps, 1.95 GHz and 24 dBm of power with a discrete tone source at the same RF frequency and power.
Signal Source ModelAlthough these sources behave like a circuit source, underneath the model is an elaborate composition of a DSP section, RF modulator, and an RF output resistance. The figure shows the 3GPP source model.
Whether a transmitter or receiver design, the Error Vector Magnitude (EVM) signal performance is of high interest. Of particular interest is the ability to probe EVM at each node. This can be done using the modulated sources and expressions. One has to place the appropriate source and label the desired nodes. EVM (and other) expressions can then be written on schematic page or after completion of simulation on data display window referencing the desired nodes. The following traces display the magnitude and phase of one burst of the WLAN signal at the differential output nodes. The figure also shows a table with seven EVM values at various nodes from left to right for a given RF signal power. The %rms EVM values indicate a significant jump at node evm3.
To verify a design as is required by the standards, it is often a requirement that the compliant "source" and corresponding "measurements" be linked. This means that for some measurements synchronization with "stimuli" maybe required. We define the combined & linked source and measurement a "Test Bench". Wireless Test BenchesADS 2004A introduces the following new test benches: WLAN
3GPP
TD-SCDMA
A test bench typically has an RF output port and a measurement input port. A visual depiction of a Test Bench and how it looks on the schematic page is shown below.
AVM or Fast Cosim OptionFor efficient simulation the "AVM or Fast Cosim" option of Circuit Envelope simulator can be activated. This option generates a model for the circuit that can be simulated much more efficiently and with very high accuracy. Figures below show the dialogue box for AVM setup and a model generated for an LNA circuit.
Test Bench ResultsThe time domain signal generated by the bench RF output is a fully formatted signal. In the case of WLAN short and long preamble, SIGNAL and data segments of a WLAN 802.11a burst are present. The simulation results below show two sets of WLAN 802.11a spectrums for the four segments of the burst at the input and output of a DUT. The spectrum of the input to DUT (left column) clearly shows the wide carrier spacing of the short preamble and flatness of long preamble spectrum. The Measured spectrum (right column) indicates loss of flatness on the spectrum of the Long Preamble and SIGNAL portions of the burst. These plots provide a good resource for debugging and monitoring the nonlinearities and distortions due to the DUT.
In addition to spectrum and envelope waveform results, many other Test Bench for CCDF, constellation, EVM and power measurement as well as receiver performance with BER/PER are available. The results below show the sensitivity of PER as a function of gain and phase imbalance from a WLAN 802.11a receiver Test Bench.
Instrument CompatibilityTransmitter wireless test benches support instrument connectivity. The wireless test benches rely on Connection Manager for instrument connectivity. WLAN test benches, signal sources, and EVM measurements are compatible with the Agilent E4438C ESG Vector Signal Generator, and Agilent 89600 Series Vector Signal Analyzer. TD-SCDMA test benches and signal sources are compatible with Agilent E4438C Signal Generator and Agilent 89600 Series Vector Signal Analyzer. 3GPP FDD test benches and signal sources are compatible with Agilent E4406A VSA Series Transmitter Tester, Agilent PSA Series High-Performance Spectrum Analyzer, and Agilent 89600 Series Vector Signal Analyzer. SummaryAgilent Technologies' Advanced Design System 2004A EDA software offers wireless system verification to circuit designers for WLAN, 3GPP and TDSCDMA technologies. Compliant Stimuli-Measurements and a collection of Test Benches on the circuit schematic page allow the circuit designer to verify RF component and subsystem performance with system measurements such as EVM, BER, and ACPR on circuit page and with native circuit simulators. For More Information ...
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