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Advanced Design System 2001 - What's New?

		Advanced Design System 2001 is the latest release of Agilent EEsof EDA's Advanced Design System communications design software. ADS 2001 builds on the proven strengths of previous releases, it includes major product enhancements, and it adds much that is new. ADS 2001 improves design productivity and design flow integration, especially in RFIC and RF/MMIC/Microwave design. Design with confidence. ADS 2001 is the right choice for communications design.

ADS 2001 Release Highlights Usability and Ease of Design Easier to use than any previous release of ADS. Enhanced Ease of Design by means of the DesignGuide application layer. Simulation Technology Superior simulation technology and performance. The most accurate and comprehensive set of models and Wireless Design Libraries. RFIC Design Integration with the Cadence RFIC Design Flow. Supported by the major RFIC Foundries. Instrument Links for Design Verification Links with Agilent instrumentation create a complete design and verification solution. Open Architecture for Design Flow Integration DesignGuides, Foundry Design Kits, Design Flow Integration support integration of industry expertise and partners into the ADS environment.

ADS 2001 New Features Complete Microsoft PowerPoint Slide Presentation (53 slides; Microsoft PowerPoint .ppt file 5.8 MB) Usability and Ease of Design Smart Simulation Wizard Electronic Lab Notebook Data Display: Edit Axis Scales On-Screen Simulation Technology Simulation Advances: Convergence, Capacity, Speed, Analysis DC Convergence: DC Pseudo-Transient Algorithm Improved Harmonic Balance: Convergence, Memory, Speed Speed and Convergence Benchmarks Statistical Design Package Swept and Programmable Optimization Design of Experiments Support for Platform Computing's Load Sharing Facility (LSF) Simulation Output Control Other Simulation Improvements RFIC Design Cadence Design Flow Integration RFIC Dynamic Link for Cadence Netlist Translator Enhancements Bus Wires and Bundles RFIC Foundry Support Silicon RFIC Foundry Design Kits Communication Systems Design 3GPP W-CDMA and EDGE Design Libraries - Updates CDMA2000 Design Library - Update 5-GHz Wireless LAN Design Library - Update CDMA2000 1xEV Design Library HDL Co-Simulation and Agilent Ptolemy Design Verification: ADS and Instrumentation Design Verification: ADS-VEE Link RF Board/Microwave Design GaAs Foundry Support Layout Enhancements for MMIC Design Easy Grid Settings ON/OFF Orthogonal Mode Chop Command Crop Command Split Command Other Enhancements RF Board Design Flow Integration ADS 2001 Migration Series IV to ADS Translator MDS to ADS Translator Products and Features Shipped Since ADS 1.5 DesignGuides DesignGuide Developer Studio Transient Assisted Harmonic Balance (TAHB) Example Application: Frequency Divider Example: Speed and Convergence Using TAHB and Krylov Simulation Model Composer Design Verification: Handset PA ValiFire ADS 2001 New Features Complete technical details on all new features in ADS 2001 are available as part of the online user documentation: User Documentation: New in ADS 2001 Usability and Ease of Design Innovative new features make ADS 2001 easier to use than any previous release of ADS, for beginners and occasional users and for experts. Ease of Design is also enhanced by the latest additions to the family of DesignGuides that take designers step by step through complex design flows. Smart Simulation Wizard makes it easy to create ADS circuit schematics, to set up and run simulations, and to view results. Smart Simulation Wizard includes pre-configured schematics, simulation setups, and data displays for typical RF and microwave applications. No manual setup of simulations or ports is required. Smart Simulation Wizard automatically generates an appropriate schematic configuration and a set of commonly-used simulations for current design. When the simulations are complete, the data display window automatically opens and displays all the simulation results in an easily customized format. Smart Simulation Wizard Electronic Lab Notebook captures schematics and layouts and simulation results in HTML format for design review, archive, demonstration, and sharing over the web. Electronic Lab Notebook supports: Automatic capture and updating of images from ADS, including schematics, layouts, and data displays. HTML formatted output of results, which can then be distributed and viewed easily with Microsoft's Internet Explorer web browser, revisions 4.0 and above. Graphics import from external sources, to add to the notebook graphics generated by other products. Electronic Lab Notebook Display Enhancements include the ability to zoom in on selected objects, on the schematic, and to edit axis scales directly on the data display. Data Display: Edit Axis Scales On-Screen Additional Information: Usability and Ease of Design E 8900A Design Environment E8901A Data Display DesignGuides New in ADS 2001: Usability and Interface Enhancements Simulation Technology Circuit simulation has been a key strength of ADS from the time of its first release. For ADS 2001, special emphasis has been placed on speed and convergence simulating circuits with strong nonlinear responses and large circuits with a large number of active elements. The ability to handle circuits of these types is an important requirement in simulating RFIC designs. Simulation Advances: Convergence, Capacity, Speed, Analysis DC Pseudo-Transient Algorithm enables convergence for a wider range of DC circuits. It is quicker on many circuits than the default DC algorithms. The improvements are especially helpful for designs with a large number of nonlinear components and equations. DC Pseudo-Transient Algorithm Improved Harmonic Balance: Convergence, Memory, Speed. Block Selection Preconditioning (BSP) makes Krylov Harmonic Balance much more robust on highly nonlinear circuits. ADS now also enables: Auto-selection of Krylov and Direct modes. Strict Convergence Check Relaxed Convergence Check Intermediate Convergence Other preconditioning methods include Shur complement (Lucent), an efficient and robust preconditioner for nonlinear Harmonic Balance simulations; and improved heuristics that reduce setup complexity and the need for the designer's intervention in the simulation process. Simulator memory and use model improvements include the following: Waveform caching that requires less recalculation. Preset tolerance settings that simplify simulation. Harmonic Balance frequency re-mapping algorithms that reduce memory requirements for system simulation. Improved Harmonic Balance: Convergence, Memory, Speed Speed and Convergence Benchmarks Statistical Design Package. The ADS 2001 Statistical Design Package offers a full complement of statistical design features, including yield analysis and yield optimization (design centering), design of experiments, sensitivity analysis, correlation analysis with any distribution, and mismatch models statistical analysis. The variables and equations component (VAR) can now be associated with optimization goals. Statistical Design Package Swept and Programmable Optimization. Optimization, Yield, Yield Optimization, and DOE can now be swept as in any other ADS analysis. Any level of sweep nesting can be used and multiple controllers may be referenced at any level. Swept and Programmable Optimization Design of Experiments (DOE). Design of Experiments is now included in ADS 2001 optimization module. This feature allows you to use the DOE method with ADS. Design of Experiments Support for Platform Computing's Load Sharing Facility (LSF). Enables automatic selection of the best set of remote machines. Simple swept simulations can also be configured to utilize many available machines on the network using the Parallel Simulation feature. Platform Computing's LSF product is required for this functionality. Support for Platform Computing's Load Sharing Facility (LSF) Simulation Output Control. Simulation output control makes it possible to specify a subset of circuit node voltages and any variable or measurement equation (at any level in the circuit hierarchy) for output to a dataset. The output of nodes and measurement equations can be controlled either by hierarchy or by name. Simulation Output Control Other Simulation Improvements. Other simulation improvements include the ability to reference directly a variable defined by VAR in a MeasEqn for RF/analog simulations, to link statistical design controllers, and to compute NFssb and NFdsb when NoiseInputPort and NoiseOutputPort are specified. It is no longer necessary to search through all of the NF[ ] entries to find the noise figure. Noise contribution now reports the flicker noise contribution separately and includes an abbreviated noise contribution option that reports only the total for each device. Other Simulation Improvements Additional Information: Simulation Technology E8881A Linear Simulation E8882A Harmonic Balance Simulation E8883A Circuit Envelope Simulation E8885A Convolution Simulation E8824A Statistical Design New in ADS 2001: Circuit Simulation Improvements New in ADS 2001: New Optimization and Statistical Design Features RFIC Design Cadence Design Flow Integration RFIC Dynamic Link for Cadence. E8790 RFIC Dynamic Link for Cadence has been enhanced in many respects. Among the most table are these: Direct simulation of DIVA extractedSupport for using Hierarchy Editor and config views. Support for ADS/Cadence bus pins in instantiated cells. RFIC Dynamic Link for Cadence Netlist Translator Enhancements. Netlist Translator Enhancements Bus Wires and Bundles. Bus wires and wire bundles are now implemented by means of wire labels, on both analog/RF and DSP schematics. Taps off of individual wires, bus pins, iterated instances, and connectivity checking are supported. Bus Wires and Bundles RFIC Foundry Support. Silicon RFIC Foundry Support now includes major foundries such as IBM, Taiwan Semiconductor Manufacturing Company (TSMC), STMicroelectronics, and others, and a range of fabrication processes. Silicon RFIC Foundry Design Kits Additional Information: RFIC Design E8888A RFIC Designer E8940A RF Board Designer E8970A RFIC Dynamic Link to Cadence E8880A SPICE Netlist Translator E8894A RF IP Encoder E896x IFF Translators Communication Systems Design 3GPP W-CDMA and EDGE Design Libraries - Updates E8875A 3GPP FDD W-CDMA Design Library E8879A EDGE Design Library 3GPP W-CDMA and EDGE Design Libraries - Updates CDMA2000 Design Library - Update E8877A CDMA2000 Design Library CDMA2000 Design Library - Update 5-GHz Wireless Design Library - Update E8874A 5-GHz Wireless LAN Design Library 5-GHz Wireless LAN Design Library - Update CDMA2000 1xEV Design Library Design Library E8878A CDMA2000 1xEV Design Library CDMA2000 1xEV Design Library HDL Co-Simulation and Agilent Ptolemy Design Verification: ADS and Instrumentation Design Verification: ADS and Instrumentation Design Verification: ADS-VEE Link Design Verification: ADS-VEE Link Additional Information: Communication Systems Design E8850A Communication Systems Designer E8881A Linear Simulation E8882A Harmonic Balance Simulation E8883A Circuit Envelope Simulation E8885A Convolution Simulation E8859A GSM Design Library E8868A DTV Design Library E8875A 3GPP FDD W-CDMA Design Library E8877A CDMA2000 Design Library E8879A EDGE Design Library E8874A 5-GHz Wireless LAN Design Library E8878A CDMA2000 1xEV Design Library RF Board/Microwave Design GaAs Foundry Support Layout Enhancements for MMIC Design Easy Grid Settings ON/OFF Orthogonal Mode Chop Command Crop Command Split Command Other Enhancements RF Board Design Flow Integration ADS 2001 Migration Series IV to ADS Translator MDS to ADS Translator Products and Features Shipped Since ADS 1.5 DesignGuides DesignGuide Developer Studio Transient Assisted Harmonic Balance (TAHB) Example Application: Frequency Divider Example: Speed and Convergence Using TAHB and Krylov Simulation Model Composer Design Verification: Handset PA ValiFire

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