Communications Semiconductor Executive Conference
9 - 10 April 2003 - Papers

Turning Technology Into Profit

The 2003 Communications Semiconductor Executive Conference
Hosted by Agilent EEsof EDA

Keynote Address
Navigating the Downturn - Capitalizing on the Recovery
William P. (Bill) Sullivan
Executive Vice President, Chief Operating Officer
Agilent Technologies

As communications semiconductor companies navigate a difficult economic environment, they also face fundamental industry changes. For example, technological leadership alone is no longer sufficient to gain design wins and earn profit in this highly competitive landscape. Bill will elaborate on industry changes and give examples of what Agilent is learning as it adjusts its business strategies to meet these new challenges. In conclusion, Bill will provide his perspectives for industry leaders on suggested areas of focus to promote their future success.

William P. (Bill) Sullivan is executive vice president and chief operating officer of Agilent Technologies. In this capacity, he shares the responsibilities of the president's office with Agilent CEO and President Edward W. (Ned) Barnholt. Sullivan focuses on operations, their improvement, management processes and short-term strategic and tactical issues. Sullivan also has overall responsibility for Agilent's Electronic Products and Solutions Group (EPSG), the company's largest business group.

Sullivan, who was senior vice president and general manager of Agilent's Semiconductor Products Group (SPG) before his appointment as COO, joined Hewlett-Packard Company in 1976 and during the course of his career, developed considerable expertise in telecommunications, data communications, and computers. In 1995, he was promoted to general manager of the Optical Communication Division. Two years later, Sullivan was appointed a general manager of the Communication Semiconductor Solutions Division, which was formed by combining the semiconductor portion of the former Communication Components Division with the Optical Communication Division. He became general manager and vice president of the Components Group, now called the Semiconductor Products Group, in 1998. In 1999, when Agilent was spun off from HP, he was named to the top position within SPG.

Sullivan, who was born in 1949 in Yakima, Washington, received a bachelor's degree in environmental science from the University of California at Davis.

Complete Slide Presentation     (PDF, 1.0 MB).

News@Agilent - Agilent Executive Vice President and COO Bill Sullivan discusses with customers today's technology industry challenges

Featured Speaker
The Technology Revolution and The Future of Design Automation
Ted Vucurevich
Senior Vice President, Office of the Chief Technology Officer
Cadence Design Systems, Inc.

The electronics industry continues to represent one of the most exciting and technically challenging areas of engineering. Every aspect of product development from specification to production volume is under pressure to be optimized due to exponentially increasing design cost and risk. This presentation will attempt to shed light on the major challenges design teams must overcome to produce reliable, cost effective, profitable, and timely complex electronic systems. It will explore some of the technologies that EDA companies are bringing to market to address a number of these challenges within the context of effective partnership across engineering teams and corporate boundaries.

Ted Vucurevich serves as a Cadence Senior Vice President, reporting to Ray Bingham, President and CEO. He is responsible for driving advanced technology development and directing Cadence(r) Laboratories. In addition, he serves as an executive fellow.

Vucurevich co-leads the Strategic Technology Office (STO) with Steve Teig. The STO researches, plans, and promotes a world-class Cadence technology roadmap and vision to Cadence employees, customers, and analysts. As director of Cadence Laboratories, Vucurevich represents Cadence on various external boards and interfaces between research efforts and product development.

In his prior role as chief architect at Cadence, Vucurevich helped develop the strategies and technology initiatives in system-on-a-chip (SoC)-based design, DSM infrastructure, software interoperability, design methodology development, and Internet-based electronic system design.

Vucurevich joined Cadence in 1992 as director of the Analog Physical Design group. In 1994 he was promoted to work as an architect in the Viper Development group. He was later named chief architect and held that position for five years. Prior to Cadence, Vucurevich worked 14 years at Analog Devices where he held roles in product, design, and computer-aided design (CAD) engineering. He was a co-founder of the Linear Signal Processing Division, where he was responsible for the implementation of a complete mixed-signal ASIC CAD environment.

Vucurevich received his bachelor of science degree in electrical engineering from the University of Arizona.

Complete Slide Presentation     (PDF, 6.0 MB).

Maximizing R & D ROI Through University and Government Collaboration
Dr. Joy Laskar, Joseph M. Pettit Professor in Electronics
Yamacraw Research Director, School of Electrical and Computer Engineering, Georgia Tech, Atlanta, Georgia

Georgia announced in January 1999 that it would create a job growth program that would establish a cluster of electronic design competence with accompanying highly skilled jobs over five to seven years. The program, currently midway through the third year, has proven to be an important asset to Georgia. At its launch, the purpose was to create 2,000 jobs in Georgia for electrical and computer engineers. This was defined in its original mission as "a unique strategic economic development initiative aimed at making Georgia a world leader in the design of broadband (high-speed) communications systems, devices and chips, thus bringing high-paying jobs to the state." Today, this initiative has over 30 member companies who have committed to hire in excess of 3,100 design professionals over the next five years. More than 1,600 of these positions have already been filled and 6 start-up companies have been generated with several more in development.

In this paper we will review the development of the State of Georgia's partnership with Georgia Tech for industry/university partnerships, joint ventures and impact upon job growth in Georgia. We will review several key areas including: unique university/industry collaboration, IP models, a framework for mutual success, sustained university/industry interaction and some examples of what may be successful in the future in a difficult funding environment.

Dr. Joy Laskar received the B.S. degree (Computer Engineering with Math/Physics Minors, highest honors) from Clemson University in 1985. He received the M.S. and the Ph.D. degrees in Electrical Engineering from the University of Illinois at Urbana-Champaign in 1989 and 1991 respectively. Prior to joining Georgia Tech in 1995, Dr. Laskar held faculty positions at the University of Illinois and the University of Hawaii. At Georgia Tech, he holds the Joseph M. Pettit Professorship of Electronics, is currently the chair for the Electronic Design and Applications Technical Interest Group, the Director of Research for the state of Georgia's Yamacraw Design Center and the System Research Leader for the NSF Packaging Research Center.

He currently heads a research group of 25 members with a focus on integration of high frequency electronics with optoelectronics and integration of mixed technologies for next generation wireless and optoelectronic systems. Dr. Laskar has authored or co-authored more than 200 papers, several book chapters, has ten patents pending and has co-founded two companies.

Complete Slide Presentation     (PDF, 2.4 MB).

Transitioning to Commercial EDA Tools - A Case History
Kathy Krisch, Director of Modeling and Design Kits
Agere

The increasing complexity and performance of IC designs requires highly capable yet cost-effective CAD tools, and many IC design companies have opted to meet this need by obtaining their CAD tools from EDA vendors, rather than building the software in-house.

This paper will describe some advantages, challenges, and strategies for success in transitioning from in-house CAD tools over to commercially-based CAD platforms and design flows. Topics include building and leveraging vendor partnerships, technology transfer of essential CAD IP, and migration and training of circuit designers and CAD support teams.

Dr. Kathleen S. Krisch is Director of Modeling and Design Kits in the Design Platforms Organization at Agere Systems, in Allentown, PA. Kathy received the B.S., M.S. and Ph.D. degrees in Electrical Engineering from MIT. She joined AT&T Bell Labs in 1992, and did research on gate dielectrics, noise and substrate crosstalk. She became a manager in 1998, and is presently responsible for Spice, Timing and Functional models, Agere's Analog/Custom and Digital/ASIC design kits, and Physical Verification tools and flows.

Complete Slide Presentation     (PDF, 156 KB).

Reducing Costs and Speeding Development with Device Characterization
Marc Maury, President
Maury Microwave

Accurate device characterization begets accurate simulation, allowing RF engineers to get the most value and productivity out of their CAD tools. This paper discusses the advantages of using an automated device characterization load-pull system as an integral part of semiconductor design process to ensure; first time design success, reduction in design time/cost, design validation/verification, and improvements in time to market. The paper also discusses measurement flexibility supporting designers needs for G3, WLAN, Bluetooth, and WI-FI.

Marc A. Maury was born February 18, 1938, in Havana, Cuba, and with the rest of his family migrated to the US in 1944. One of the three principal founders of Maury Microwave. The company was founded on March 21, 1963.

Mr. Maury has held number of positions throughout the history of the company, most notable being Manufacturing Operations Manager and VP of quality. Currently Mr. Maury is president and chairman of the board.

Maury Microwave manufactures precision calibrations and measurement tuner bases measurement instruments. Being channel partners with Agilent Technologies has provided the company to offer turnkey systems to RF and Microwave R & D labs.

Complete Slide Presentation     (PDF, 1.0 MB).

Partnering for Efficient Solutions to the RF and Microwave Modeling Problem
Dan Vasilca, Engineering Manager, Corporate IT
Motorola

Addressing the RF and microwave modeling problem is gaining importance as companies strive to meet ever more stringent design specification accelerating time to market demands. Accurate RF circuit simulation and optimization are key levers in improving electrical engineering productivity. Motorola has partnered with the University of South Florida and Modelithics, Inc. in a research project aimed at generating high quality RF simulation models of board-level components, to be utilized by the hundreds of RF product development engineers employed at Motorola. The paper will focus on the investment decision, business case, and results of this effort to get products containing Motorola RFICs to market more quickly.

Dan Vasilca graduated with a degree in Wireless Engineering from the Polytechnic Institute of Bucharest, Romania, in 1972. He joined Motorola, Inc., in 1978, as an RF engineer, at the Land Mobile Products Sector (LMPS) facility in Toronto, Canada. Here, he used Super-Compact CAD software running on a Xerox Sigma-9 mainframe computer for designing mobile, portable and fixed radio transceivers for public safety agencies.

Since 1981 Vasilca has held various engineering management positions, responsible for hardware and software development projects within LMPS. He introduced the first workstation-based CAD tools at the Toronto facility - Mentor Graphics and HP MDS. In 1996 he transferred to the Plantation, FL facility of LMPS, to lead a core team responsible for a common CAD library to be used in board-level design and simulation worldwide. In 1999 this responsibility widened to encompass PCS, GTSS, and PCS design centers worldwide, and he became the technology champion for HP/Agilent RF CAD tools at Motorola.

Complete Slide Presentation     (PDF, 2.3 MB).

Design in the Downturn
Dr. Brian Hughes, Manager, Agilent Worldwide Technology and Process Centers
Agilent Technologies

There's no doubt that the communications semiconductor industry is operating in a drastically different mode than it was just two or three years ago. Whether you believe the recovery has already happened or not, the operational focus of high frequency semiconductor design needs to shift to reflect an environment that many industry leaders may never have experienced before. This paper presents an economic model for tactical decision making and relates it to the past and current high tech product environment. The changes in business drivers between the bubble and the downturn will be explored along with the conclusions that are currently driving Agilent's microwave design process and technology decisions.

Dr. Brian Hughes manages the Design Technology Group for Agilent Worldwide Technology and Process Centers. Brian received a B.Sc. degree from the University of London, Queen Mary College, and M.S. and Ph.D. degrees from the University of Southern California. He has twenty years of HP/Agilent experience in development, management, and consulting. He was a design process consultant advising HP/Agilent customers worldwide on improving their high-frequency design processes. He was Agilent Corporate EE Program Manager. He was a visiting professor teaching at Cornell University and the University of California, Santa Barbara. He received the Lew Platt "CEO Customer Satisfaction Award", and has more than 40 publications.

Complete Slide Presentation     (PDF, 1.4 MB).

Excel Spreadsheets:   Bubble     Downturn

Design to Verification Process Improvements Provide Competitive Advantage
David Swaddell, Staff Systems Engineer, and
Morteza Saidi, Director of RF/Analog and WLAN Technology
RF Micro Devices

The success and future growth of most communications IC companies depends on winning the time-to-market race. Device modeling and system level reference radio verification are vital components of an efficient and reliable design flow. As such, RFMD of San Jose, California (formerly Resonext Communications), was able to create a competitive advantage by combining Electronic Design Automation (EDA) design software with measurement instrumentation to bridge the development efforts of both chip level and system level design teams.

This paper will describe methods employed by RFMD to reduce WLAN product development times, and accelerate introduction of WLAN consumer products. The Return on Investment (ROI) realized by implementing both system and circuit level design and verification process improvements will also be examined.

David Swaddell joined Resonext in April 2002. As a Senior RF Systems Engineer one of his responsibilities was setting up the RF test lab for the radio-on-a-chip start up. As the radio products evolved, David participated in all the decisions to upgrade the Resonext RF lab with state-of-the-art test and measurement equipment. Prior to joining Resonext, David was a Senior RF Systems Engineer at Radiolan. In addition to his six years of direct experience in the WLAN industry, David has over ten years experience in microwave circuit and RFIC design with Samsung Electronics, Pacific Monolithics and Avantek.

Morteza Saidi, Chief Technical Officer and co-founder of Resonext, has over 19 years of experience managing and developing RF products. In his previous position as Director of RF Development at VLSI Technology, Morteza developed the first 0.2-micron RF CMOS models and RF blocks for wireless applications. Other products he was instrumental in developing included analog baseband processors for CDMA application, synthesizers and transceiver for Bluetooth applications.

Prior to VLSI, Morteza worked 17 years with Philips Semiconductor where he developed the second-generation IS136 RF chip set using the latest BiCMOS technology. In addition, Morteza led the joint development of the first CDMA integrated RF and baseband product, and was also involved in a number of other core technology developments. Such cores included: FM/IF, Mixers, LNAs, and VCOs. These developments all led to a number of products that included analog cellular, IS136 GSM, Wireless LAN, and GPS.

Morteza received a Bachelor of Science degree in Electrical Engineering from University of Michigan and a Masters of Science degree in Electrical Engineering from University of Michigan in 1979.

Complete Slide Presentation     (PDF, 398 KB).

Improving RF Design Methodology - GSM Transceiver and Power Amp Case Study
Masao Hotta, Senior Chief Engineer and General Manager
Advanced Analog Technology Division
Renesas Technology Corporation (formerly Hitachi)

Higher performance and lower cost transceivers and power amplifiers are continuously required to support the growing number of cellular handsets and protocols. As the cellular handset market grows, it requires timely production of high quality RF-ICs and high power amplifiers. Improving RF design methodology is one of keys to achieving rapid improvement in function integration, performance, and system architecture. This paper describes and examines RF design methodology challenges encountered in the design of GSM transceiver LSI and Si-power-MOS amplifier modules. In conclusion, new design methodologies are introduced that were successfully implemented with reduced risk in the design/development schedule.

The newly developed transceiver LSI for GSM/DCS employs direct-conversion architecture to reduce the number of components in the RF section of the handset, and it includes self-calibrating circuits to cancel the DC offset. The IC consists of a fully integrated dual band direct-conversion receiver, an offset PLL transmitter, and synthesizers. System level simulation was extremely effective in accelerating the development of the new architecture. Furthermore, Si-power-MOS amplifier module with high efficiency has been developed for GSM handset phones. In this case, technology CAD was instrumental in achieving the desired performance in terms of reliability, cost and size.

The paper concludes with a presentation of process technology, design methodology, and system partitioning tradeoffs, that improved design productivity without delaying time to market in the context of a successfully completed project. The presentation introduces the efficient RFIC design methodologies that helped accelerate product development and leverage the design expertise of Hitachi's most experienced engineers.

Masao Hotta received the M.S. and Ph.D. degrees in electronics from Hokkaido University, Sapporo, Japan, in 1973 and 1976, respectively. In 1976 he was with the Central Research Laboratory, Hitachi Ltd., Tokyo, Japan. He is presently a Senior Chief Engineer & General Manager of Advanced Analog Technology Division, Semiconductor & Integrated Circuits, Hitachi Ltd. He is conducting development on RF power amplifier modules, RF transceiver LSIs and mixed-signal LSIs.

Dr. Hotta served on the technical program committees of CICC, BCTM and ASIC/SOC Conference, and he is a fellow of IEEE.

Complete Slide Presentation     (PDF, 2.6 MB).

Today's A/MS IC Design Environment - A Foundry's Perspective
Michael Keene, Design Kit Manager
IBM Microelectronics

The basic A/MS IC design environment has existed for many years, but some interesting adaptations have developed over the last year or two. EDA vendors have generated various tutorials and white papers promoting improvements, features, and benefits of their point tools in a design flow. In addition, the recent multitude of mergers, acquisitions and alliances have changed the landscape and may fundamentally alter the "standard" design flow and possibly improve the way that foundries, EDA tool vendors and design/CAD teams interact. This paper will present a foundry point of view on the present challenges in the A/MS design environment and the EDA industry.

Michael Keene manages an A&MS design kit development team at IBM in Burlington, Vermont. His team is responsible for the device library and PCELL development for IBM's Cadence-based SiGe and RFCMOS design kits, as well as the enablement of ADS using RFDE, and also the management of the design kit Final Test team. For the past several years, Mike has led his team's efforts to develop strong working relationships with IBM's EDA partners. Mike's previous assignments at IBM include RF characterization, device modeling, and ADS design kit development. Mike received his BSEE degree from Norwich University in 1989, and MSEE degree from the University of Vermont in 1991. Mike resides in Berlin, Vermont with his wife and two children.

Complete Slide Presentation     (PDF, 215 KB).

A New Technology for WLAN Power Amplifiers
Robert Hickman, Senior Principal Engineer, and Charles Huang, Executive Vice President and Chief Technical Officer
ANADIGICS, Inc.

Most efforts to lower the cost and complexity of 802.11 a/b/g WLAN devices are currently being focused on integrating the entire transceiver, including the PA, using SiGe, CMOS and other well established process technologies. The great hope is that these established processes will allow for higher levels of integration and lower cost. However, each process has its own particular advantages and disadvantages that must be considered when choosing a technology and integration approach for a particular design application. This paper examines the device characteristics of the InGaP HBT and outlines its advantages and disadvantages in 802.11 combo PA applications. The examination will also look at cost and performance tradeoffs of an integrated Silicon PA versus a discrete PA using InGaP HBTs.

Dr. Robert Hickman is a device engineer for ANADIGICS, Inc., where he has engaged in new technology development since 1999. He has contributed to the development of broadband MESFET, switch PHEMT and InGaP HBT technologies produced at ANADIGICS. Dr. Hickman has 8 years of experience developing new technologies in III-V materials, processes, devices and characterization. Prior to ANADIGICS, Dr. Hickman was with SVT Associates where he developed HEMTs, HBTs, photodetectors and emitters in materials systems including III-nitrides, GaAs, InP and antimonides. Dr. Hickman is an IEEE member.

Dr. Hickman is a graduate of the University of Cincinnati, where he received his Doctorate in Electrical Engineering.

Dr. Charles Huang is Executive Vice President and Chief Technical Officer of ANADIGICS, Inc., a position he has held since co-founding the Company in 1985. Dr. Huang is also an IEEE Fellow. ANADIGICS is a leading supplier of radio frequency and microwave frequency gallium arsenide (GaAs) integrated circuits. Dr. Huang has over 25 years of design, development and production experience with GaAs technology for such companies as Hewlett-Packard, Avantek and ANADIGICS.

Dr. Huang is a graduate of the University of California, Berkeley, where he received his Doctorate in Electrical Engineering.

Complete Slide Presentation     (PDF, 3.1 MB).