Agilent Technologies, Inc.
  March 2007 | Issue 95
In This Issue:
Also of Interest:
Signal Integrity Design Tools Seminar

Career Opportunities with Agilent EEsof EDA
 
Features
GENESYS 2007 Coming Soon!

Announcing GENESYS 2007, a landmark new release that will be downloadable at the end of March. Beta customers have been loving the new features, such as LiveReport, an interactive window that collects live views of all the objects your workspace on one page. It is a personal project cockpit of your schematics and graphs that when you’re finished designing, becomes your design documentation.

GENESYS 2007 also unlocks 17 Verilog-A nonlinear transistor models for general use, adds many features to Spectrasys, and sparkles with a wide variety of single-click user interface conveniences. Outside the US, GENESYS is being translated into 5 new languages, with more to come.

Randy Rhea, founder of Eagleware and active GENESYS user, says

"For years GENESYS was refined, improved and ultimately pushed to the limit. But two-decade old code and syntax hampered moving forward. After the transition to Agilent, it was just a huge project to update the code and get the innovations in the software working smoothly. But I love 2007.03, and beta testing the new release has been a joy. GENESYS is well positioned for another decade of growth."

Next month, Agilent will initiate a program to assist customers to migrate to the new release. Watch for the announcement that downloads are available from the Agilent KnowledgeCenter!

Check out all the new capabilities of GENESYS 2007 »




Maintenance Software Releases Provide Tune-Up for ADS and RFDE

EDA software is much like a trusted transportation vehicle. Regular tune-ups help keep it running safely and reliably. Maintenance Software Release 1 for ADS and RFDE 2006A is now available to update your own installations with the latest qualified defect repairs.

For RFDE, select RFDE under Software Downloads, then RFDE 2006A. From the Maintenance Software Release 1 page for each product, you can use the "Read Me" link to learn about specific defect repairs included in the release.

Please note that the MSR1 is different than the ADS/RFDE 2006 Update 1, which was introduced in last month's EDA Product & Application News
(archived here). Update 1 provides new technology for Signal Integrity, expanded device models and improved integration and compatibility with third-party tools.

Read all about ADS Update 1 or RFDE Update 1 on our website.




Interested in Synthesizing Filters? Here’s How Using GENESYS and EMPOWER

Check out this article describing how to use EM simulation to aid a classic and underutilized filter design technique. The technique requires building prototypes of a few select resonators and plotting certain measured data. From these plots the filter dimensions are easily synthesized. Modern EM simulation breathes new life into this technique by eliminating the need to construct prototypes. This is particularly important when a process requires a long manufacturing cycle time.

Read the Article »




Characterizing and Improving the Performance of Bondwires

Bondwires are a widely used standard method of connecting microwave ICs and interconnect circuitry. The high impedance of bondwires causes inductive discontinuities, which result in impedance mismatches and unwanted reflections.

We recently published a paper (in Microwave Engineering Europe) that demonstrates how to characterize and model bondwires using 3D EM modeling and lumped element models to accurately predict the frequency-and time-domain performance of bondwire interconnects. Modeled results for a bondwire interconnect between two thinfilm circuits are compared with measured results, and fequency performance is improved by adding a compensation network.

Read the Article »




Jim McGillivary
Vice President & General Manager
Agilent EEsof EDA
  Conversations with the GM:
Semiconductor Foundries Get Help with Device Modeling Challenges 
  There have been a lot of changes in the normally quiet device modeling world. Device modeling is very important for the semiconductor market. It allows foundries to characterize their latest processes and package them into design kits for their customers. An error at this step makes it impossible to accurately predict circuit behavior.

In the silicon part of this market, there are two big trends that are driving change. One is the increasing number of processes to characterize. Device modeling is a difficult task, yet the workload of these teams is going up fast. New processes keep coming on line, and older processes find new life in different applications. A number of key customers have asked us for help. Using our deep understanding of how designers characterize these processes, we implemented ways to make them much more efficient. Most customers report that we have taken a typical 14-day characterization timeframe down to 2 days.

Secondly, newer and faster silicon processes have outgrown the BSIM model, which has been the industry standard compact model for Metal-Oxide-Semiconductor (MOS) transistor technology for more than two decades. After an extensive evaluation by industry and academia, a new model, called PSP, was chosen as the new standard for MOS transistors. We are currently the only company that provides modeling and characterization technology for the PSP model. Some of our competitors were so sure that BSIM would last forever, they made BSIM part of the product name. Since our IC-CAP device modeling software supports both Gallium Arsenide and Silicon processes, we built it to flexibly support many different compact models, now and in the future. 

As always, I’m interested in your ideas and feedback. Just drop me an e-mail!
 


Career Opportunities with Agilent EEsof EDA

If you are an EDA champion with knowledge and skills that fit well with our products and technology offerings, we are interested in hearing from you.

To browse all current opportunities with our industry-leading EDA software division, follow the link and search with the keyword EEsof.

http://jobs.agilent.com/index.html
 

Events
Americas -- Events
  Quick Start Training for Engineers New to ADS and GENESYS

  13 - 14 March, Andover, Massachusetts, USA


A Complimentary Workshop
ADS
is acknowledged as the industry's most powerful RF circuit simulation environment. Come experience how ADS offers complete design integration to designers of products such as cellular and portable phones, pagers, wireless networks, and radar and satellite communication systems.

GENESYS is integrated software for RF and microwave component and subsystem designers needing affordable state-of-the-art performance in a single easy-to-use design environment that is fast and powerful. Come experience how GENESYS can help you complete better designs faster from initial system architecture through final documentation.

In these two interactive workshops, we provide PCs for you to work through instructor-lead examples. By the end of the session, you will know the general capabilities and be much more productive with both Advanced Design System and GENESYS when you return to work.

More »
 


  Webcast: Accurate Transient Simulations at Gigabit/s Data Rates

15 March 2007, 10:00 a.m. - 11:00 a.m. PST
 
The latest release of ADS features a rich set of technologies for rigorous, accurate and robust transient (SPICE) simulation of high speed circuits.

This webcast focuses on breakthrough improvements to the high frequency transient simulation technology in ADS, introducing several powerful techniques for causality correction and passivity enforcement. We discuss new and rigorous approaches to delay causality enforcement and optimal techniques for frequency response preservation. We also offer practical tips for proper formulation of a class of passive models, resulting in dramatically improved performance in transient simulations.

Several real-world examples, including measured data comparisons, are used to illustrate the latest improvements to our simulation technology.

Register today
 


  New Signal Integrity Design Tools and Methods for High-Speed Digital Communications Seminar

  27 March - 17 May  USA/Canada

Attend this complimentary Signal Integrity design seminar and learn how new technology in ADS delivers simulators optimized for use at high data rates, system-level co-simulation and accurate, insightful jitter characterization. Product demonstrations and papers by SI experts, including renowned SI design consultants from Bogatin Enterprises and Teraspeed Consulting, will provide you with comprehensive solutions to the tough signal integrity problems designers are facing today.

More »


  Webcast: RF Circuit Synthesis for Physical Wireless Design

  28 March, 10:00 - 11:00 a.m. PST

Wireless RF designs have moved higher in frequency, making formerly routine circuit design tasks more difficult. Impedance matching, filtering, and signal routing now need to account for the parasitic and variations of their physical environment, and these performance imperfections need to be accounted for at the system level. By incorporating Synthesis tools directly into a low-cost RF EDA tool with physical design, EM simulation, system design, statistical analysis, and optimization, RF designers can successfully extend MHz design techniques to wireless applications in the GHz range. This webcast shows how modern Circuit Synthesis tools enable faster RF design to higher frequencies, yet retain their elegant simplicity.

Register Today »

 
Europe -- Events
  Open your Eyes—Modeling, Design, and Testing Considerations for High-Speed Serial Bus Designers

  15 March, 9:00 - 16:00,  Winnersh, UK

The Eye Diagram is one of the more familiar measurements in the Signal Integrity community. With ever increasing bit rates many digital circuit designers are struggling to maintain the “Eye” open as their signals go through complex interconnects, connectors and cables.

This seminar covers topics from advanced measurement-based modeling techniques, to how to use these models to improve system performance, to implementing accurate system-level simulation of high-speed links, to the measurement and analysis of multi-Gigabit signals using sophisticated eye-diagram and jitter analysis techniques.

Join us and with the help of product demonstrations and the interaction with our technical experts and applications engineers we will open your eyes to new design and measurements possibilities.

Register Today »
 

Training
North/South America -- Training
  Advanced Design Fundamentals Class (3 day)
  24 Apr 26 Apr Schaumburg, IL
  22 May 24 May Santa Clara, CA
  19 Jun 21 Jun Richardson, TX

  Advanced Circuit Simulation Techniques (3 day)
  3 Apr 5 Apr Andover, MA

  Designing for Signal Integrity with ADS (3 day)
  22 May 24 May Englewood, CO

  GENESYS Concepts (3 day)
  3 Apr 5 Apr Englewood, CO
  30 May 1 Jun Westlake Village, CA

  Momentum for ADS Users  (2 day)
  15 May 16 May Santa Clara, CA
  19 Jun 20 Jun Andover, MA

  Using ADS Communication Systems Designer (3 day)
  24 Apr 26 Apr Andover, MA

All classes are subject to change and/or cancellation.
Class descriptions and registration
Japan -- Training
  ADS Quick Start (1 day)
  5 Apr   Shin-yokohama, Japan
  10 May   Shin-yokohama, Japan

  ADS Fundamentals (3 days)
  11 Apr 13 Apr Shin-yokohama, Japan
  16 May 18 May Shin-yokohama, Japan

  ADS Communications System Design (3 days)
  28 Mar 30 Mar Shin-yokohama, Japan
  23 May 25 May Shin-yokohama, Japan

  ADS Circuit Advanced (2 days)
  19 Apr 20 Apr Shin-yokohama, Japan

  ADS Momentum (1 day)
  6 Apr   Shin-yokohama, Japan
  11 May   Shin-yokohama, Japan

  Ptolemy Quick Start (1 day)
  25 Apr   Shin-yokohama, Japan

  Ptolemy for Communications Signal Processing (2 days)
  26 Apr 27 Apr Shin-yokohama, Japan

All classes are subject to change and/or cancellation.
Class descriptions and registration
© Agilent Technologies, Inc. 2007
 

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